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| 2016-09-28 1 rev. 1.0 XDPL8105 - digital flyback controller ic xdp? digital power datasheet about this document scope and purpose this document contains in formation about infineon high-performance single-stage digital flyback controller XDPL8105 for led lighting applications. features and el ectrical characteristics are listed and explained. intended audience this document is intended for custom ers wishing to design high-performan ce single-stage digital flyback ac- dc converters for led lighting based on the XDPL8105 controller
XDPL8105 - digital flyback controller ic datasheet datasheet 2 rev. 1.0 2016-09-28 revision history page or item subjects (major ch anges since prev ious revision) rev. 1.0, 2016-09-28 revision history XDPL8105 - digital flyback controller ic datasheet datasheet 3 rev. 1.0 2016-09-28 table of contents about this document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1 pin configuration and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 controller features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.1 primary side voltage and current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2.1.1 input current sensing via pin cs and output current calc ulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.1.2 input voltage sensing via pin zcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.1.3 output voltage sensing via pin zcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.2 primary side control scheme for out put current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.3 power factor correction (pfc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.4 dimming via pin dim/uart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.5 isolated dimming interface wi th cdm10v (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.6 wide output load voltage range circuit (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2.7 automatic output discharge circuit (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2.8 vcc startup function combined with di rect input monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2.9 configurable soft start and output charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2.10 configurable gate voltage rising slope at pin gd (lower emi) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.3 protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.3.1 undervoltage lockout for vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.2 overvoltage protection for vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.3 over / undervoltage protecti on for output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.4 over / undervoltage protection for input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3.5 input overcurrent detection level 1 (ocp1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.6 input overcurrent protection level 2 (ocp2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.7 output overcurrent protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.8 overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.9 firmware protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.4 configuration and support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.4.1 configuration procedure and design-in support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.4.2 overview configurable parameters and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.4.3 debug mode support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.1 package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.3 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.4 dc electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4 outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 datasheet 4 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet overview product highlights ? highly accurate primary side cont rolled output current (line/load regulation typical within +/- 3%) ? high power quality (typical pf up to 0.99 and thd < 10%) ? high efficiency (up to 91%) ? configurable output current with no bom change ? supports universal inpu t voltage (85 ? 305 v ac) ? supports wide output load voltage (up to 4 times of minimum output load voltage) ? ideal for application with dimming sign al from micro-controller on primary side ? supports fully isolated 0 ? 10 v dimming with infineon cdm10v ? supports low output current dimming. ? low standby power features ? single stage qr flyback with pfc and high precisio n primary side controlled constant current output ? excellent line and load regulation ? supports ac input (45 ~ 65 hz) an d/or dc input voltage operation ? integrated 600 v startup cell ? low bill of material (bom) ? configurable parameters, e.g. adjustable vo ltage and current ranges, protection modes ? supports non-dimmed and/or dimmed applications. ? intelligent thermal management with adaptive thermal protection applications ? electronic control gear for led luminaires (5 w to 80 w) description the XDPL8105 is a high performance mi crocontroller-based digital single-s tage flyback controller with power factor correction (pfc) for constant output current ap plications. the ic is availa ble in a dso-8 package and supports a wide feature set, requir ing a minimum of external componen ts. the digital engine offers the possibility to configure operational parameters and prot ection modes, which helps to ease the design phase and allows a reduced number of hardware variants in production. accurate primary side output current control is implemented to eliminate the n eed for secondary side feedback circuitry. table 1 product type package XDPL8105 pg-dso-8 datasheet 5 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet figure 1 typical application 1 (prima ry side micro-controller dimming) figure 2 typical application 2 (secondary side 0-10v dimming) 85 ? ? ? 305 ? vac vcc internal temperature sensor zero crossing detection startup cell control pwm current sensing dimming / uart cs gd gnd zcd XDPL8105 square wave generator sqw parameters configuration dim/uart output hv primary side micro-controller pwm dimming signal rc low pass filter external vcc supply 85 ? ? ? 305 ? vac vcc internal temperature sensor zero crossing detection startup cell control pwm current sensing dimming / uart cs gd gnd zcd XDPL8105 square wave generator sqw parameters configuration dim/uart 0 ? ?10 ? v input output hv isolated dimming circuit with cdm10v cdm10v digital to analog conversion vcc rdim+ iout datasheet 6 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet pin configuration and description 1 pin configuration and description the pin configuration is shown in figure 3 . the pin functions are listed and described in table 2 . figure 3 pin configuration table 2 pin defini tions and functions symbol pin type function zcd 1 i zero crossing detection pin zcd is connected to an auxiliary winding via the resistor divider for zero crossing detection. output & input voltage are also measured with the sampled positive & negative voltage sensing. dim/uart 2 i/o dimming / uart shared functioning pin with either as dimming input or uart configuration. the dimming input voltage, v dim sensing range is from 0.1 to 2v. once the pin voltage exceeds 2.2v (for example when the isolated usb interface board is connected to the ic), this pin will func tion as uart configuration and the ic will stay in non-dimming operation unless it is reset or restarted. cs 3 i current sense pin cs is connected to an external shunt resistor and the source of the power mosfet. gd 4 o gate driver output signal to drive an external power mosfet. hv 5 i high voltage pin hv is connected to the rectified input voltage via external resistor. an internal 600 v hv startup-cell is used to pre-charge vcc for ic startup once the mains input voltage is applied. furthermore sampled high voltage sensing is used for synchronization with the input voltage frequency. sqw 6 o square wave generator pin sqw is capable of providing a square wave signal for driving the isolated dimming transformer circuit, if necessa ry. otherwise, this signal can be turned off by parameter configuration. vcc 7 i voltage supply ic power supply gnd 8 ? power and signal ground 1 2 3 4 6 7 8 sqw zcd vcc cs gnd pg-dso-8 (150mil) gd 5 hv dim/uart datasheet 7 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2 functional description the functional description provides an overview about the integrated functi ons and features as well as their relationship. the mentioned parameters and eq uations are based on typical values at t a = 25 c. the corresponding min. and max. values are shown in the electrical characteristics. 2.1 introduction the XDPL8105 is a digital ac/dc flyback controller with power factor correction (pfc). the pfc function enables a rectified sinusoidal input current waveform with a power factor typically up to 0.99 and thd < 10% for a wide range of operating condit ions. XDPL8105 provides primary side co nstant output current control that avoids the secondary side control feedback loop circui try usually needed in isol ated power converters. this approach supports a low part count that is necessary to build up th e application. XDPL8105 has multi-mode operations and it selects the best mode of oper ation based on operating conditions. the multi-mode operation will automatically switch between quasi-reso nant mode (qrm) and discontinuous mode (dcm) and active burst mode (abm). in addition, XDPL8105 suppor ts both secondary side 0 - 10 v dimming and primary side micro-controller dimming applic ation. digital and rf interfaces can be supported by a microcontroller using a digital-to-analog converter. the XDPL8105 provides a high flexibility in the design-in of the application. a graphic user interface (gui) tool called .dp vision supports users to tune a set of config urable parameters. the configuration can be done via a single pin uart interface at pin dim/uart. 2.2 controller features table 3 gives an overview about the controller features that are described in the mentioned chapters. table 3 controller features primary side voltage and current sensing chapter 2.2.1 primary side control scheme for output current control chapter 2.2.2 power factor correction (pfc) chapter 2.2.3 dimming via pin dim/uart chapter 2.2.4 isolated dimming interface with cdm10v (optional) chapter 2.2.5 wide output load voltage rang e circuit (optional) chapter 2.2.6 automatic output discharge ci rcuit (optional) chapter 2.2.7 vcc startup function combined with direct input monitoring chapter 2.2.8 configurable soft start and output charging chapter 2.2.9 configurable gate voltage rising slop e at pin gd (lower emi) chapter 2.2.10 datasheet 8 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.2.1 primary side voltage and current sensing the XDPL8105 provides a primary side control of the output current by means of measuring the input peak current and measuring the conduction period of the output diode. input and output voltages are measured at pin zcd using an external resistor divider and an auxi liary winding of the transformer. the voltage signal v aux contains the information of the rectified input voltage v in and the output voltage v out at the secondary side. figure 4 shows typical current and voltage waveforms of the quasi-resonant flyback application. the following topics are described: ? input current sensing via pin cs and output current calculation ( chapter 2.2.1.1 ) ? input voltage sensing via pin zcd ( chapter 2.2.1.2 ) ? output voltage sensing via pin zcd ( chapter 2.2.1.3 ) figure 4 typical waveforms (examp le with qrm valley switching) ` t 0v v aux i trafo t i s i p n_s n v v out aux _a = t sample2 t sample1 v gd t t on t demag valley switching i p zero crossing detection i p(pk) v aux i p i s v in v out n_p n_s n_a t period i s(pk) n_p n v v in aux _a ? = + - + - + - datasheet 9 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.2.1.1 input current sensing via pin cs and output current calculation the output current i out is determined by the primary input peak current i p,pk which is sensed at pin cs at time t sample1 , by the duration of conduc tion of the output diode (t sample2 - t sample1 ) and by the switching period t period . the result is used for the control loop and for output overcurrent protections ( chapter 2.3.7 ). 2.2.1.2 input voltage sensing via pin zcd the input voltage is measured using current i iv at pin zcd at time t sample1 . as the voltage v aux is a negative voltage, pin zcd is clamped to a fixed negative voltage v inpcln ( figure 5 ). the negative current i iv (flowing out of pin zcd) is proportional to th e input voltage. the monitored input voltage is used for input over- and undervoltage protection ( chapter 2.3.4 ). figure 5 input voltage sensing via pin zcd 2.2.1.3 output voltage sensing via pin zcd the output voltage is measured using voltage v zcdsh at pin zcd at time t sample2 ( figure 6 ). the measured voltage at pin zcd and the dimensioni ng of the resistor divider are used to calculate the reflected output voltage at the auxiliary winding. the sensed output voltage is used for output over- and undervoltage protection ( chapter 2.3.3 ). the relation between vcc and zcd can be decoupled by adding a voltage regulator for vcc ( chapter 2.2.6 ). figure 6 output voltage sensing via pin zcd note: please note that the time (t sample2 - t sample1 ) has to be longer than 2.0 s to ensure that the reflected output voltage can be correctly sensed at pin zcd! zcd v aux i iv v inpcln r _zcd_1 r _zcd_2 n _a n _p gd v in input ? filter ? cap zcd v aux v zcdsh r _zcd_1 r _zcd_2 n _a n _s v out v _out_diode_drop datasheet 10 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.2.2 primary side control sche me for output current control the basic control scheme for the primary si de constant current control is shown in figure 7 . figure 7 integrated pi control scheme for output current control the sampled signal v cs at pin cs and zero crossing detection at pin zcd are used to estimate the output current i out as described in chapter 2.2.1.1 . the internal reference current i _out_set is weighted according to thermal management and dimming cu rve. the average estimated output current is compared with the weighted reference current to generate an error signal. th e error signal is fed into a pi regulator to control the pwm at pin gd for the power mosfet. the coeffi cients of the pi regu lator are configurable. the pi regulator allows different modes of operation as shown in figure 8 : ?quasi-resonant mode (qrm) this mode controls the on-time and maximizes the effi ciency by switching on at the 1st valley of the v aux signal. this ensures zero-current switch ing with a minimum of switching losses. ? discontinuous mode (dcm) this mode is used if th e on-time cannot be reduced further in qr m while the output is being dimmed. the controller will extend the switch ing period later than the 1st va lley to control the output power. ? active-burst mode (abm) to extend the dimming range even further, XDPL8105 features an abm wh ich is automatically aligned with the input frequency to avoid any undesired effects like flicker or shimmer as well as to reduce any audible noise. the controller will autonomously select the best mode of operation based on operat ion conditions like input voltage, input frequency and dimming input voltage which defines the output power. cs peak input current detection n _p r _cs pi pwm + - output current calculation zero crossing detection zcd n _a r _zcd_2 r _zcd_1 intelligent thermal management dimming curve dim/ uart gd min moving average filter v in datasheet 11 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description figure 8 overview of operation modes 2.2.3 power factor correction (pfc) the gate driver gd is used for driv ing the power mosfet of the flyback. constant output current regulation and a sinusoidally shaped input cu rrent are achieved by on-time cont rol. the quasi-constant on-time t on ensures high pf and low thd performa nce. the internal control signal t on is calculated by the digital engine so that the output current is cl ose to the target current ( chapter 2.2.2 ). optionally, an enhanced pfc (epfc) scheme can be enabled to compensate th e input current distortion caused by the emi filter 1) . in this scheme, the on-time is a functi on of the internal controller signal t on , the input voltage v in , output voltage v out , output current i out , phase angle and a config urable gain parameter (c _emi ) optimizing the input current waveform ( chapter 2.4 ). 2.2.4 dimming via pin dim/uart the voltage sensed at pin dim/uart is used to determine the ou tput current level. figure 9 shows the relation of dim/uart voltage to the output current target value. levels of v _dim_min and v _dim_max 2) ensure that minimum current i _out_dim_min and maximum current i _out_set can always be achieved, making the application robust against dimmer and other compon ent tolerances. the sampled voltage v dim at pin dim/uart is digitally filtered to stabilize light output. the XDPL8105 can also be configured to use a linear or a quadratic dimming curve. figure 9 dimming curves base d on pin dim/uart voltage 1) patent pending 2) fixed at 1.72v power qrm dcm abm frequency controlled on-time controlled pulse number controlled t _on_max t _on_min f_sw_min_dcm f _sw_max or qr switching frequency (with t_on_min) v dim/uart i out v _dim_min i out i _out_dim_min i _out_set i _out_dim_min i _out_set v _dim_min v dim/uart v _dim_max 2.0v v _dim_max 2.0v datasheet 12 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description optionally, the dim-to-off featur e can be enabled by parameter en _dim_to_off , so that the output current can be turned off and on with dim/uart pin voltage of v _dim_off and v _dim_on respectively . figure 10 dimming curves based on pin dim/ uart voltage (with dim-to-off feature enabled) note: the dim-to-off feature requires an active voltage source to exit the dim-to-off state. in some cases where the dimming contro l circuitry is on the primary side and it is using pwm control, please use the rc low pass filter circuit which will convert th e pwm dimming signal to an analog dimming voltage for measurement on pin dim/uart. 2.2.5 isolated dimming interface with cdm10v (optional) figure 11 shows an exemplary schematic of a 0-10v dimm ing interface for low bom cost, using cdm10v by infineon. cdm10v is a fully integrated 0-10v dimming interface ic which transmits secondary side analog voltage based signals from 0-10v dimme r to primary side, by driving an external opto-coupler with a 5ma current based pwm signal. the secondary auxiliary wind ing is necessary to supply the operating voltage of cdm10v. for more details about cdm10v, please visit infineon website: http://www.infineon.com/cdm10v figure 11 optional circuit fo r isolated dimming with cdm10v v dim/uart v dim/uart i out v _dim_max v _dim_min i out v _dim_off i _out_dim_min i _out_set v _dim_max i _out_dim_min i _out_set v _dim_on v _dim_min v _dim_off v _dim_on 2.0v 2.0v datasheet 13 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.2.6 wide output load voltage range circuit (optional) if wide output load voltage is required, a regulator for vcc is required. this re gulator limits the maximum voltage at pin vcc during steady state operation. figure 12 shows an exemplary sc hematic for the optional wide output voltage range support. a wide output voltage range impacts efficiency due to the necessary voltage regulator for vcc. figure 12 optional wide output voltage range circuit 2.2.7 automatic output discharge circuit (optional) in case of a fault (e.g. open load) the output capaci tors stay charged and may keep a high voltage. it is therefore recommended to ad d an automatic output discharge circui t. this circuit discharges the output capacitors if the main switch stop s switching. for the circuit design, please refer the schematic in the application note of the XDPL8105 40w reference design with cdm10v. 2.2.8 vcc startup function combine d with direct input monitoring there are two main functions supported at pin hv wh ich needs to be connected to the input voltage via resistor and two diodes. the integrated hv startup-cell is swit ched on during the vcc startup phase before the ic is activated. current flows from pin hv to pin vcc via an internal diode, which charges the capacitor at pin vcc. once the voltage at pin vcc exceeds the v vccon threshold, the ic enables the active operating phase and switches off the hv startup-cell. furthermore, a direct input monitoring is supported that is controlled by an internal timer. the timer switches on the hv startup cell for a very short time after a defined period. during this short on-time the current is sensed at pin hv by a comparat or to synchronize to frequency and phase of the input voltage. 2.2.9 configurable soft start and output charging after startup condition(e.g. input voltage, junction temper ature) is checked within th e limits, the ic initiates a soft-start. during soft-start, the sw itching stress for the power mosfet, diode and transformer is minimized. the cycle-by-cycle current limit is increa sed in steps with a configurable time t _ss for each step. the number of soft start steps is defined by parameter n _ss 1) . after startup pin cs maximum voltage limit of v _start_ocp1 level has been reached, the output will be charged up with maximum on-time and v _start_ocp1 level to the minimum output voltage that ensures self-supply, v _out_start but below the fully dimmed mi nimum output led voltage, v _out_dim_min . after the output voltage reaches v _out_start level, the output consta nt current control loop 1) fixed at 3 r vccreg c vccreg vcc c vcc zd vccreg gnd datasheet 14 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description ( chapter 2.2.2 ) takes over and the pin cs maximum vo ltage limit will be changed from v _start_ocp1 to v _ocp1 level. figure 13 configurable soft start and output charging phase 2.2.10 configurable gate voltage ri sing slope at pin gd (lower emi) the gate driver output signal can be configured with respect to the risi ng slope for switching on the power mosfet. this feature can save bom components (1 di ode & 1 resistor) which are conventionally added to achieve the same purpose fo r emi improvement. the maximum gate drive current i _gd_pk for the gate driver slope can be set between 30 ma and 118 ma ( chapter 2.4 ). figure 14 shows the gate driver output signal. figure 14 configurable gate voltage rising slope for lower emi v _start_ocp1 0 2 ? t ss time soft ? start ? phase output ? charging ? phase output ? current ? regulated ? mode startup ? check (e.g. ? input ? voltage, ? ic ? temperature) t ss t out,charge v _out_start startup 3 ? t ss v _ocp1 v _out_dim_min control ? loop ? initialization vout cs ? pin ? max ? voltage ? limit voltage t v gd i _gd_pk = 30ma =118ma 10.5v i _gd_pk datasheet 15 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.3 protection features table 4 gives an overview about the avai lable protection features and corr esponding default actions in case a protection feature is triggered. two protection reactions (auto restart mode and latch mode) are implemented. auto restart mode once the auto restart mode is activated, the ic stop s the power mosfet switching at pin gd and reduces the current consumption to a minimum. after the configurable auto restart time t _auto_restart the ic initiates a new start-up 1) . during this auto restart, the hv startup-cell is switched on and off in order to keep the vcc between v uvlo and v ovlo thresholds 2) . the auto restart cycle starts first with charging the vcc capacitor by means of switching on the hv startup cell until the v vccon threshold is exceeded. a regular startup procedure with soft start is initiated afterwards. latch mode when latch mode is activated, the power mosfet switching at pin gd is immediately stopped. the hv startup- cell is switched on and off in order to keep the vcc between v uvlo and v ovlo thresholds. the device stays in this state until input voltage is completely re moved and the vcc voltage drops below the v uvlo threshold. the ic can then be re-started by applying input voltage. 1) after t _auto_restart , the vcc will be charged to v vccon again(see chapter 2.2.8 ). therefore, the effective au to-restart time is longer than t _auto_restart 2) this feature can be disabled for a pplications with externally supplied vcc. table 4 protection features protection feature active period (if enabled) reaction description undervoltage lockout for vcc always on hardware restart chapter 2.3.1 overvoltage protection fo r vcc always on latch mode 1) 1) protection which its reaction can be configured to either auto restart mode or latch mode. chapter 2.3.2 overvoltage protection for v out always on auto restart 1) chapter 2.3.3 undervoltage protection for v out activated after startup 2) 2) protection which can be disabl ed or enabled by configuration. auto restart chapter 2.3.3 startup undervoltage protection for v out during startup auto restart chapter 2.3.3 overvoltage protection for v in always on 2) latch mode chapter 2.3.4 undervoltage protection for v in always on 2) auto restart chapter 2.3.4 input overcurrent detection le vel 1 always on current limiting chapter 2.3.5 input overcurrent protection level 2 always on latch mode chapter 2.3.6 output current protection (ave rage) activated after startup 2) auto restart chapter 2.3.7 output current protection (p eak) activated after startup 2) auto restart chapter 2.3.7 overtemperature protection always on latch mode chapter 2.3.8 firmware protections (1st watchdog & ram parity) always on auto restart chapter 2.3.9 datasheet 16 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.3.1 undervoltage lockout for vcc an undervoltage lockout unit (uvlo) is implemented wh ich ensures a defined enabling and disabling of the ic operation depending on the supply voltage at pin vc c. the uvlo contains a hy steresis with the voltage thresholds v vccon for enabling the ic and v uvoff for disabling the ic. once the mains input voltage is applied, current flows through an exte rnal resistor into pin hv via the integrat ed diode to pin vcc. the ic is enabled once vcc exceeds the threshold v vccon and enters normal operation if no fault condition is detected. in this phase vcc will drop until the self supp ly via the auxiliary winding takes over the supply at pin vcc. for proper startup, the output voltage of v _out_start level for vcc self supply via auxili ary winding must be in place before vcc falls below v uvoff threshold and before timeout of t _start_max for the startup output undervoltage detectionoccurs (see chapter 2.3.3 ) 2.3.2 overvoltage protection for vcc overvoltage detection at pin vcc is implemented via a threshold of v _vcc_max . 2.3.3 over / undervoltage protection for output voltage overvoltage (e.g. open load) or undervoltage (e.g. output short) detection of the output voltage v out is provided by the measurement and calculation as described in chapter 2.2.1.3 . the overvoltage protection reaction (auto-restart or latc h) and detection thresholds v _outov are configurable. fo r output overvoltage protection in auto-restart reac tion, either slow or fast auto -restart can also be selected. please note that there are possibiliti es where critical protection like ou tput over-voltage not working properly (example: wrong parameter configurations loaded). thus , please consider adding zener diode or any voltage suppressor device/circuit on output for reinforced safety purpose. note: it is mandatory to have output discharge resistor /circuit which discharges the output capacitor after triggering open load protection at v_outov. latch reaction is recomm ended for open load protection as it can shut down the unit to preven t output overcharged if the discharg e resistor ohmic value is too high. figure 15 voltage threshold for output overvoltage protection v out time turn-on start of control-loop removal of led load (output open) with slow ? auto \ restart ? and ? with ? output ? dummy ? resistor ? (passive) with fast ? auto \ restart ? enabled ? and ? with ? output ? dummy ? resistor ? (passive) startup with ? slow ? auto \ restart ? and ? with ? output ? discharge ? circuit (active) v _out_start v _outov regulated mode auto-restart protection triggering of output ovp v _out_dim_min datasheet 17 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description the undervoltage protection reaction is fixed as auto-restart and its detection threshold v _outuv is fixed at 50% of the configurable fully dimmed minimu m output load voltage parameter, v _out_dim_min . output undervoltage protection is disabled during the startup phase. figure 16 voltage threshold for output undervoltage protection in case of output short/undervol tage, the auxiliary winding cannot provide power to vcc during startup because the output voltage stays below v _out_start or v _outuv . therefore, the startu p output undervoltage protection is triggered if the output voltage has not reached v _out_start before a configurable timeout of t _start_max occurs during the startup phase. to ensure that the startup unde rvoltage protection is in auto- restart reaction, the pin vcc capacitance has to be high enough to maintain the vcc above v uvoff threshold long enough until the timeout of t _start_max occurs during the startup phase. figure 17 voltage and timing threshold fo r startup output undervoltage protection 2.3.4 over / undervoltage protection for input voltage an over / undervoltage dete ction of the input voltage v in is provided by the measurement and calculation as described in chapter 2.2.1.2 . the v in rms value is calculated based on the measured v in peak value and compared to the configurable internal input over / undervol tage protection thresholds v _inov and v _inuv ( chapter 2.4 ). v out time v _outuv turn-on start of control-loop output short v _out_dim_min startup v _out_start regulated mode output uvp triggered after t_vout_blank v out time v _outuv turn-on startup output uvp triggered v _out_dim_min t_start_max v _out_start datasheet 18 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description figure 18 shows an exemplary setting of bo th over- and undervoltage thresh olds together with configurable startup thresholds v _in_start_min and v _in_start_max to create hysteresis for flicke r-free operation at auto-restart. figure 18 voltage threshold for input over / undervoltage protection 2.3.5 input overcurrent detection level 1 (ocp1) the input overcurrent protection level 1 is performed by means of the cycle-by-cycle peak current limitation to v _ocp1 . a leading edge blanking, t _csleb prevents the ic from falsely switching off the power mosfet due to a leading edge spike. 2.3.6 input overcurrent protection level 2 (ocp2) the input overcurrent protection level 2 is meant for cove ring fault conditions like a short in the transformer primary winding. in this case overcurr ent protection level 1 will not limit properly the peak current due to the very steep slope of the peak current. once the threshold v _ocp2 is exceeded for longer than t _csocp2 , the protection is triggered. 2.3.7 output overcurrent protections the XDPL8105 includes protections against exceeding an average and peak current limit. the average output current is calculated over one half cy cle of the input frequency to remove the output current ripple. with auto- restart reaction, either slow auto-restart or fast auto -restart can be selected. 2.3.8 overtemperature protection XDPL8105 offers a conventional as well as an adaptive overtemperature protection scheme using an internal temperature sensor. note: please note that the internal temperature sensor may not be able to sense and protect the temperature of external components (e.g. power mosfet, vcc regulator) wi thout sufficient thermal coupling. conventional overte mperature protection the overtemperature protection initia tes a thermal shutdown once the in ternal temperature detection level t _critical is reached. with latch mode protection, ic will tu rn off and only restart after recycling of input power. at startup, junction temperature has to be below t _start . v in t v _inov v _in_start_max v _inuv (brown-out protection level) v _in_start_min (brown-in level) turn-on turn-on turn-on shut-off shut-off datasheet 19 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description figure 19 conventional temperature protection adaptive temperature protection to protect load and driver against overtemperature, XDPL8105 features a reduction of output current below maximum current i _out_set . as long as temperature t _hot is exceeded, the current is gradually reduced as shown in figure 20 . if a reduction down to a minimum current i _out_red is not able to comp ensate the increase of temperature, the overtemperature protecti on (with latch mode) is entered when t _critical is reached. figure 20 adaptive temperature protection 2.3.9 firmware protections XDPL8105 includes several protecti ons to ensure the integrity and flow of the firmware: ? a hardware watchdog triggers a pr otection in case the firmware does not service the wa tchdog within a defined time period. ? a ram parity check trigge rs a protection in case a bit in the memory flips. ? a cyclic redundancy check (crc) at each startup verifies the integrity of firmware and parameters. ? a first firmware watchdog trigge rs a protection if the adc hard ware cannot provid e all necessary information within a defined time period. this may oc cur if timing requirements for the adc are exceeded. ? a second firmware watchdog trigge rs a protection if the execution of protection checks and the control loop are not matching a defined time period. this ma y occur if timing requirem ents are exceeded (e.g. operation beyond frequency limits). i out t _critical t _start t j or ? below latch ? reset i out time t j ? = ? t i out t t j t i _start t _hot t t _critical i _out_red ? ? i _out_set i _out_red i _out_red _hot t _hot datasheet 21 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description transformer primary winding turns n _p 58 > 0 transformer secondary winding turns n _s 15 > 0 transformer auxiliary winding turns n _a 15 > 0 transformer nominal primary inductance l _p 0.544 mh calculated by gui current sense resistor r _cs 0.22 ohm calculated by gui pin cs ocp1 limit during regulated mode v _ocp1 0.49 v calculated by gui pin zcd series resistor r _zcd_1 56.2 kohm calculated by gui pin zcd shunt resistor r _zcd_2 2.00 kohm calculated by gui vcc voltage supply type v cc_supply wide [external, narrow, narrow_24.9v, wide] vcc capacitor total capacitance c _vcc 15.0 uf calculated by gui output capacitor maximum voltage rating v _out_cap_rating 63 v 0 pin hv series resistor r _hv 66 kohm calculated by gui gate driver peak source current i _gd_pk 49 ma 30 ma to 118 ma (with few ma change per step) protections auto restart time t _auto_restart 1 s 0.1 s to 25.5 s 1) fast auto restart time t _auto_restart_fast 0.4 s 0.1 s to 25.5 s 1) output ovp / open reaction reaction _ovp_vout auto restart [auto restart, latch mode] auto restart speed for output ovp speed _ovp_vout slow [slow, fast] output ovp threshold v _outov 48.4 v v _out_dim_min to v _out_cap_rating enable output uvp / short protection en _uvp_vout enabled [enabled, disabled] timeout for short detection at startup t _start_max 10.0 ms calculated by gui enable maximum average output ocp en _iout_max_avg enabled [enabled, disabled] enable maximum peak output ocp en _iout_max_peak enabled [enabled, disabled] maximum peak output ocp threshold i _out_max_peak 1980 ma calculated by gui auto restart speed for output ocp speed _ocp_iout slow [slow, fast] enable input ovp en _ovp_in enabled [enabled, disabled] enable input uvp en _uvp_in enabled [enabled, disabled] input ovp threshold v _inov 329 v rms 2) calculated by gui maximum startup input voltage v _in_start_max 329 v rms 2) v _in_start_min to v _inov minimum startup input voltage v _in_start_min 72 v rms 2) v _inuv to v _in_start_max input uvp threshold v _inuv 62 v rms 2) calculated by gui vcc ovp reaction reaction _vccp latch mode [auto restart, latch mode] enable debug mode debug_mode disabled [enabled, disabled] temperature guard table 5 list of configurable parameters (cont?d) description parameter exam ple configuration range datasheet 22 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description overtemperature detection threshold t _critical 119 c 110c to (t j(max) - 6c) enable adaptive temperature protection en _itp enabled [enabled, disabled] temperature to start derating of i out t _hot 110 c 0 c to t _critical minimum i out for adaptive temperature protection i _out_red 220 ma 0 ma to i _out_set time step for each i out derating t _step 10 s 2 s to 20 s startup & shutdown soft start timestep t _ss 0.5 ms calculated by gui minimum v out when fully dimmed v _out_dim_min 11.9 v v _out_start to v _outov v out to start constant current control loop v _out_start 9.5 v v _outuv to v _out_dim_min pin cs ocp1 limit after startup v _start_ocp1 0.49 v calculated by gui initial mode of operation control_loop_init dcm [abm, dcm, qrm] initial dcm frequency at startup f _dcm_init 12 khz f _sw_min_dcm to f _sw_max initial number of abm pulses at startup n _abm_init 100 calculated by gui control loop qrm pi regulator proportional coefficient pi_kp_qrm 550 10 to 3000 qrm pi regulator integral co efficient pi_ki_qrm 8 1 to 1000 dcm pi regulator proportional coefficient pi_kp_dcm 17000 100 to 30000 dcm pi regulator integral co efficient pi_ki_dcm 200 10 to 10000 abm pi regulator proportional coefficient pi_kp_abm 64 1 to 600 abm pi regulator proportional coefficient pi_ki_abm 32 1 to 200 dimming enable dimming en _dim enabled [enabled, disabled] pin dim/uart voltage for minimum i out v _dim_min 0.2 v v _dim_off to v _dim_max minimum iout when fully dimmed i _out_dim_min 88 ma calculated by gui dimming curve shape c _dim quadratic [linear, quadratic] enable dim-to-off en _dim_to_off disabled [enabled, disabled] pin dim/uart voltage for dim-to-off v _dim_off 0.18 v 0.1 v to v _dim_on pin dim/uart voltage for dim-to-on v _dim_on 0.19 v v _dim_off to v _dim_min enable square wave output for pin sqw en _sqw disabled [enabled, disabled] multimode maximum switching frequency f _sw_max 180.8 khz calculated by gui maximum on-time t _on_max 11.3 us calculated by gui minimum on-time t _on_min 1.1us 1 us to t _on_max minimum demagnetization time t _min_demag 3.0 us 2 us to 10 us minimum switching frequency in dcm f _sw_min_dcm 12 khz 3 khz to 20khz table 5 list of configurable parameters (cont?d) description parameter exam ple configuration range datasheet 23 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description enable active burst mode en _abm disabled [enabled, disabled] enhanced pfc enhanced pfc compensation gain c _emi 0.1000 uf 0 fine tuning zcd propagation delay compensation t _zcdpd 410 ns 0 ns to 1000 ns cs propagation delay compensation t _pdc 200 ns 0 ns to 1000 ns transformer coupling t _coupling 1.020 0.000 to 2.000 input voltage drop compensation r _in 11.9 ohm 0 switching period modulation attenuation n _dcm_mod_gain 8 [0, 4, 8, 16, 32] temperature compensation for v dim a _dim 0mv/k -8 mv/k to 8 mv/k 1) the auto-restart time has to be chosen sufficiently large enough to avoid a stepping up of the output voltage which would exceed the output overvoltage level. 2) the input voltage levels refer to ac rms voltage. if a programmed XDPL8105 is operated with both ac or dc, the threshold for dc input voltage is 1.41 times the threshold for ac rms input voltage. table 6 list of non-configurable parameters description parameter value notes hardware configuration transformer primary leakage inductance l _p_lk l _p * 1% uh output diode voltage drop v _out_diode_drop 0.7 v gate driver high voltage v _gd 10.5 v protections output uvp / short reaction reaction _uvp_vout auto restart output uvp threshold (at steady state) v _outuv v _out_dim_min *50% v steady state output uvp blanking time t _vout_blank 1ms maximum average output ocp reaction reaction _iout_max_avg auto restart maximum average output ocp threshold i _out_max_avg i _out_set * 150% ma maximum peak output ocp reaction reaction _iout_max_peak auto restart input ovp reaction reaction _ovp_vin latch mode input uvp reaction reaction _uvp_vin auto restart input ocp2 / short winding reaction reaction _ocp2 latch mode vcc ovp threshold v _vcc_max 24 v or 24.9v if v cc_supply = narrow_24.9v, 24.9v. otherwise, 24v hardware reaction for firmware protection (watchdog, ram parity) reaction _hw auto restart table 5 list of configurable parameters (cont?d) description parameter exam ple configuration range datasheet 24 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description temperature guard overtemperature reaction reaction _tp latch mode maximum startup temperature t _start t _hot -2c or t _critical -2c if en _itp = enabled, t _hot -2c, otherwise t _critical -2c i out reduction in each derating step i _out_step i _out_set /80 startup & shutdown number of soft start steps n _ss 3 dimming pin dim/uart voltage for maximum i out v _dim_max 1.72 v square-wave frequency for sqw pin f _sqw 160 khz square-wave voltage for pin sqw v _sqw 7.5 v multimode minimum switching frequency in qrm f _sw_min_qrm 20 khz enable dcm en _dcm enabled fine tuning spike blanking time for ocp2 trigger t _csocp2 240 ns leading edge blanking time t _csleb 480 ns zcd ringing suppression time t _zcdring 1200 ns blanking time for ccm protection t _ccm 10 ms number of digital filter stages for v dim n _dim_filter 6 table 6 list of non-configurable parameters (cont?d) description parameter value notes datasheet 25 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet functional description 2.4.3 debug mode support if an unexpected system protection was triggered du ring testing, user can se t parameter debug_mode to ?enabled?, which allows th e firmware status code readout from the ic to debug which protection was triggered. for example in figure 22 , the firmware status code readout in the gui shows a number of 0x0001 (in red colour), which the description shows that the output over-voltage protection has been triggered. the description of the status code will be shown automa tically when the mouse pointer is hovered around the status code. note: if there is no protection bein g triggered, the firmware status co de should be 0x0000 (in black colour) figure 22 firmware status code readout for debugging please kindly refer the application note for details on the necessary se tup & procedures to read out the firmware status code in debug mode. datasheet 26 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet electrical characteristics 3 electrical characteristics all signals are measured with respect to ground (pin 8). the voltage levels are valid if other ratings are not violated. 3.1 package characteristics 3.2 absolute maximum ratings absolute maximum ratings ( table 8 ) are defined as ratings which wh en being exceeded may lead to destruction of the integrated circuit. exposure to absolute maximum rati ng conditions for extended periods may affect device reliability. maximum ratings are abso lute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. these values are not tested during production test. table 7 package characteristics parameter symbol limit values unit remarks min max thermal resistance from junction to ambient r thja ? 178 k/w pg-dso-8 1) 1) jedec 1s0p at pv = 140 mw table 8 absolute maximum ratings parameter symbol limit values unit remarks min max voltage externally supplied at pin vcc v cc -0.5 26 v voltage at pin gd v gd -0.5 v cc + 0.3 v voltage at pin sqw v sqw -0.5 v cc + 0.3 v ambient temperature t a -40 85 c 136.4khz < f _sw_max 180.8khz -40 105 c f _sw_max 136.4khz junction temperature t j -40 125 c 136.4khz < f _sw_max 180.8khz -40 150 1) c f _sw_max 136.4khz storage temperature t s -55 150 c soldering temperature t sold ? 260 c wave soldering 2) esd capability hbm v hbm ? 2000 v excluding pin hv 3) esd capability hbm v hbm ? 1500 v pin hv 3) voltage at pin zcd v zcd -0.5 3.6 v voltage at pin cs v cs -0.5 3.6 v voltage at pin dim/uart v dim/uart -0.5 3.6 v maximum transient input clamping for pins zcd and cs -i cln_tr ?10 ma 4) datasheet 27 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet electrical characteristics 3.3 operating conditions table 9 shows the recommended operating range wher e the electrical char acteristics shown in chapter 3.4 are valid for. maximum permanent input clamping current for pins zcd and cs -i cln_dc ?5 ma permanently applied as dc value maximum negative transient input voltage at pin zcd -v in_zcd ?1.5v 4) maximum negative transient input voltage at pin cs -v in_cs ?3.0v 4) maximum current into pin hv i hv ?10 ma voltage at pin hv v hv ? 600 v 1) auto-restart may be delayed at low input voltage condition when junction temperature is above 125 c 2) according to jesd22a111 rev a 3) esd-hbm according to ansi/esda/jedec js-001-2012. 4) only valid during transitions, allowed for maximum 2 s and with a duty cycle of ma ximum 10%. values for dc operation, see absolute maximum table. table 9 operating range parameter symbol limit values unit remarks min max lower vcc limit v cc v uvoff ? v device is held in reset when v cc < v uvoff voltage externally supplied to vcc pin v ccext ? 24 v maximum voltage that can be applied to pin vcc by an external voltage source voltage at pin gd v gd -0.3 v cc + 0.3 v voltage at pin sqw v sqw -0.3 v cc + 0.3 v table 8 absolute maximum ratings (cont?d) parameter symbol limit values unit remarks min max datasheet 28 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet electrical characteristics 3.4 dc electrical characteristics the electrical characteristics involv e the spread of values given within the specified supply voltage and junction temperature range, t j from -40 c to +125 c. typical values represent the median values related to t a = 25 c. all voltages refer to gnd, an d the assumed supply voltage is v cc = 18 v, if not specified otherwise. the following characte ristics are specified ? power supply ( table 10 ) ? clock oscillators ( table 11 ) ? internal temperature sensor ( table 12 ) ?pin zcd ( table 13 ) ?pin dim/uart ( table 14 ) ?pin cs ( table 15 ) ?pin gd ( table 16 ) ?pin hv ( table 17 ) ?pin sqw ( table 18 ) table 10 electrical characteristics of the power supply parameter symbol values unit note or test condition min. typ. max. vcc turn-on threshold v vccon 19 20.5 22 v dv cc /dt = 0.2 v/ms vcc turn-off threshold v uvoff -5% 6 +5% v vcc uvoff current i vccuvoff 52040mav cc < v vccon (min)- 0.3 v vcc threshold for turning on hv startup cell in auto restart and latch mode v uvlo -5% 7.5 +5% v vcc threshold for turning off hv startup cell in auto restart v ovlo ? 20.5 ? v vcc average quiescent current in latched mode i vccqu,latch ? 0.3 0.48 ma t j 85c, latch mode ??1.2ma t j 125c, latch mode vcc average quiescent current in auto restart mode i vccqu,restart ? 0.3 0.48 ma t j 85c, off phase in auto restart mode ??1.2ma t j 125c, off phase in auto restart mode vcc voltage for otp programming v pp 7.35 7.5 7.65 v operational values, not tested in production test datasheet 29 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet electrical characteristics table 11 electrical characteristics of the clock oscillators parameter symbol values unit note or test condition min. typ. max. main clock oscillator period t mclk 15.0 15.8 16.6 ns 136.4khz < f _sw_max 180.8khz 20.0 20.9 22.0 ns f _sw_max 136.4khz dcm minimum switching frequency f _sw_min_dcm -5.1% 1) +5.3% khz maximum switching frequency f _sw_max -5.1% 1) 1) see configuration chapter +5.3% khz table 12 electrical characteristics of the internal temperature sensor parameter symbol values unit note or test condition min. typ. max. internal temperature sensing t _critical , t _start , t _hot -6 1) 1) see configuration chapter +6 c 3 sigma deviation by lab characterization, not tested in production table 13 electrical characteristics of pin zcd parameter symbol values unit note or test condition min. typ. max. zcd clamping of negative voltages -v inpcln 150 180 220 mv analog clamp activated zcd threshold v zcddet 52035mv zcd clamping current -i iv 0.021 ? 3.14 ma zcd voltage sensing v zcdsh 0.067 ? 2.61 v zcd s&h delay of input buffer referring to positive jump of zcd voltage t zshst ??2.0snot tested in production table 14 electrical characteristics of pin dim/uart parameter symbol values unit note or test condition min. typ. max. dimming mode voltage v dim 0.1 ? 2.0 v datasheet 30 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet electrical characteristics uart mode output low voltage v uartlow ??0.8v i ol = 2 ma uart mode output high voltage v uarthigh 2.2??v i oh = -2 ma table 15 electrical characteristics of pin cs parameter symbol values unit note or test condition min. typ. max. cs voltage threshold for 1st level overcurrent protection v _ocp1 -5% 1) 1) see configuration chapter +5% v v _ocp1 = 1.08v, 0.72v or 0.54v -5% 1) +8% v _ocp1 = 0.36v cs voltage threshold for 2nd level overcurrent protection v _ocp2 -5% 1.6 +5% v 0.72v < v _ocp1 1.08v -5% 1.2 +5% v 0.54v < v _ocp1 0.72v -5% 0.8 +5% v 0.36v < v _ocp1 0.54v -5% 0.6 +5% v 0.34v v _ocp1 0.36v table 16 electrical characteristics of pin gd parameter symbol values unit note or test condition min. typ. max. output voltage at low state v gdlow ??1.6vi gd = 5 ma 1) 1) not tested in production test output voltage at high state v _gd ? 10.5 ? v tolerance of output voltage at high state v gd -0.5v ? +0.5v output high current i _gd_pk -20% 2) 2) see configuration chapter +20% ma c load = 2 nf discharge current i gddis 500 ? ? ma v gd = 4v and driver at low state table 17 electrical characteristics of pin hv parameter symbol values unit note or test condition min. typ. max. leakage current at pin hv i hvleak ??10mav hv = 600 v, hv startup cell disabled table 14 electrical characteristics of pin dim/uart (cont?d) parameter symbol values unit note or test condition min. typ. max. datasheet 31 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet electrical characteristics current for vcc cap charging i ld 3.2 5 7.5 ma v hv = 30 v; v vcc < v vccon - 0.3 v current into pin hv i hv,max ??9.6ma table 18 electrical characteristics of pin sqw parameter symbol values unit note or test condition min. typ. max. squarewave frequency f _sqw -5.1% 160 +5.3% khz output voltage at low state v sqwlow ??1.6vi sqw = 5 ma 1) 1) not tested in production test. output voltage at high state v _sqw ?v 7.5 ? v tolerance of output voltage at high state v _sqw -0.5v ? +0.5v output high current -i sqwh -20% 30 +20% ma c load = 2 nf discharge current i sqwdis 500 ? ? ma v sqw = 4v and pin at low state table 17 electrical characteristics of pin hv (cont?d) parameter symbol values unit note or test condition min. typ. max. datasheet 32 rev. 1.0 2016-09-28 XDPL8105 - digital flyback controller ic datasheet outline dimensions 4 outline dimensions figure 23 pg-dso-8 notes 1. you can find all of our pa ckages, sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . 2. dimensions in mm trademarks of infineon technologies ag aurix?, c166?, canpak?, cipos?, coolgan?, coolmos?, coolset?, cool sic?, corecontrol?, crossave?, dave?, di-pol?, drblade?, easy pim?, econobridge?, econodual?, econopack?, econopim?, eicedriver?, eupe c?, fcos?, hitfet?, hybridpack?, infineon?, isoface?, isopack ?, i- wafer?, mipaq?, modstack?, my-d?, novalithic?, omnitune?, optiga?, optimos?, origa?, powercode?, primarion?, primepack?, primestack?, profet?, pro-sil?, rasic?, re al3?, reversave?, satric?, sieget?, sipmos?, smartlewis?, solid flash?, spoc?, tempfe t?, thinq!?, trenchstop?, tricore?. other trademarks advance design system? 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(mwo) of applied wave research inc., omnivision? of omnivision tech nologies, inc. openwave? of openwave systems inc. red hat? of red hat, inc. rfmd? of rf micro devices, inc. sirius? of sirius satellite r adio inc. solaris? of sun microsystems, inc. spansion? of spansion llc ltd. symbian? of symbian software limited. taiyo yuden? of taiyo yuden co. tea klite? of ceva, inc. tektronix? of tektronix inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limi ted. verilog?, palladium? of c adence design systems, inc. vlynq? of texas instruments in corporated. vxworks?, wind rive r? of wind river systems, inc. zetex? of diodes zete x limited. trademarks update 2014-11-12 edition 2016-09-28 published by infineon technologies ag 81726 munich, germany ? 2014 infineon technologies ag. all rights reserved. do you have a question about any aspect of this document? email: erratum@infineon.com document reference legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non- infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies components may be used in life-support devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. www.infineon.com |
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